1. Field of the Invention
The present invention relates to a three-gate transistor structure, which may be used, in particular, to make random access memory cells. It also relates to a method of making a three-gate transistor structure.
2. Description of the Related Art
The search for ever higher levels of integration for integrated electronic circuits has led to the design of so-called three-dimensional component architectures. In a three-dimensional architecture, components, or parts of components, are overlaid in a direction perpendicular to the surface of a circuit substrate, instead of being juxtaposed side by side at the substrate surface level.
In particular, it is known to make MOS transistors (standing for metal-oxide-semiconductor) with surrounding gates, or MOS-GAA transistors (standing for “Gate All Around”), in which the gate surrounds a semiconductor element which extends between a source zone and a drain zone. In certain MOS-GM transistors, portions of the gate, respectively lower and upper, are disposed straddling the semiconductor element, in a direction perpendicular to the surface of a substrate of the circuit.
It is also known to make two random access nonvolatile memory cells by disposing two independent gates respectively above and below a single semiconductor element extending between a source zone and a drain zone. The two gates are situated above one and the same zone of the substrate, so that a high level of integration is obtained, as compared with two random access nonvolatile memory cells which are juxtaposed parallel to the surface of the substrate.
Nevertheless, in each case, the component or components or parts of components which are overlaid in a three-dimensional architecture accomplish an identical function, such as, for example, control of the conductivity of an MOS transistor or storage of bits.